Did Samsung Really Just Make Memory 8× Faster?

0:00 One blurry phone photo from a Taipei conference hall just pulled over 600,000 views. It shows a Samsung slide. The pitch. Take the memory chips sitting beside your GPU and stack them right on

0:12 top of the silicon. Samsung calls it ZHBM. The slide claims eight times the performance per GPU plus triple the performance per watt and thermal

0:22 resistance cut by up to 90%. And under that eight in small print sits a bracket the headlines didn't copy. First, the honest part. None of this exists as silicon yet. It's a design target for

0:35 after 2029. What Samsung has actually shown is a display mockup and three slide decks in one month. So why is the whole chip industry leaning in? Because the problem it aims at is real. It even

0:48 has a name, the memory wall. Stay with me and you'll see exactly how memory feeds a GPU. what Samsung flips and how much of that eight to believe. So start with the part you already own, the

1:00 graphics card. Every word an AI writes is a memory problem. The model's brain, its weight lives in memory chips, and the GPU u pulls them in fresh for almost every word it generates. The chips doing

1:13 that are called HBM, high bandwidth memory. You can picture a tower of memory floors drilled through with thousands of tiny vertical wires. A ground floor runs the building. The

1:24 tower doesn't sit on the GPU. It sits beside it on a silicon baseboard called an interposer. That's a warehouse across the street from the factory under the current standard HBM4. Each tower feeds

1:37 the chip through 248 wires. And Nvidia's next platform, the kind of machine you rent by the hour, rings one GPU with eight of these towers. It sounds like plenty. It isn't. Chips got faster

1:51 quicker than memory got wider. Two computer architects warned about this back in 1995. They called it the memory wall, and it's worse now. Samsung's own deck says the amount a model reads at

2:03 once grows 30 times a year, and the street has two hard limits. The first is the dock. Wires only leave through the tower's edge facing the chip, like a harbor loading every ship along one

2:15 short key. Samsung's own math says that connector eats the biggest share of the ground floor. The second is distance. Every bit swims millimeters of baseboard and packing circuits at both ends burn

2:28 power before any math happens. Samsung's memory planning chief Choy Junguk says the goal of going 3D is exactly that. Cut the energy it takes to move one single bit. So that's today. Fast chip,

2:42 wide memory, a street between them nobody can widen. Samsung's plan. Delete the street. Now watch the move. You throw away the interposer. You take the whole memory tower, flip the crane, and

2:54 land it right on top of the compute die. Between them goes one thin inter layer, a floor where a customer can drop in circuit blocks of their own. One part, memory above, processor below. And these

3:06 layers aren't soldered with little bumps anymore. They're fused. copper pad to copper pad, a technique called hybrid bonding. Each pad sits a red blood cells width from its neighbor. Where solder

3:18 bumps fit some 1500 signals in a square millimeter, fused copper fits 14,000, which changes the geometry. The whole floor becomes the connector instead of one edge. Your data drops straight down,

3:31 micrometers instead of millime, and the packing circuits simply vanish. Samsung's hot chips deck ran the numbers on a 1200 watt GPU with four memory stacks on top. It found 230% more

3:44 bandwidth, 70% better power efficiency, and about 100 watts handed back. 100 watts on 1200 is 8.3% return to compute. Say you deploy 12 of these. The savings cover a 13th GPU is worth of math. Choy

4:01 calls it a vertical highway. His bigger line, memory capacity stops being limited by the size of the circuit board before you spend that bandwidth. A question, would you bet a data center

4:12 budget on a keynote multiplier? While you decide, let's read the fine print together. In one month, Samsung pitched this three ways. Early August at a memory show in Silicon Valley eight

4:24 times against HBM5. And HBM5 itself only ships around 2028. Late August at hot chips, 230% more bandwidth than HBM 4E. Do the math with me. That's 3.3 times, not eight. September 1st, Taipei, eight

4:42 times again. Now against HBM4E, same product, three events, three different rulers. The viral photo catches what the headlines cropped. Under the eight, Samsung's own slide

4:54 says in brackets, four to eight times the ceiling got printed as the headline. That isn't lying. It's what design targets looked like before silicon. Just don't confuse a keynote with a

5:05 benchmark. So far, a real wall, a real mechanism, unproven numbers. Now, the reason it all waits until after 2029. One word, heat. A memory cell is a leaky bucket. It holds your data as a tiny

5:19 electric charge, and warmth drains the charge faster. So, memory constantly rewrites every cell just to remember. past 85 degrees C, the standard rule book doubles that refresh duty. Every

5:32 extra refresh is bandwidth you paid for and don't get. Today, a GPU's heat escapes upward through its lid into the cooler. So, stack memory up there, and you've built a very expensive electric

5:44 blanket. The exhaust path now runs through the one chip that hates being warm. Researchers at IMC, an independent chip lab, modeled exactly this. four memory towers riding a working GPU with

5:57 no mitigation at all. The silicon spiked past 140° C. The same design sitting beside the chip 69. Their fix is cool both faces of the package or slow the chip down. Slowing worked. One setup

6:13 came in under 100°, but it cost 28% of the work. Cooling both faces worked better, and their stack basically tied the old layout. So, it's possible the cooling just gets reinvented first.

6:26 Samsung's slide answers with one number. Thermal resistance, the degrees you gain per watt pushed through, drops 75 to 90%. Against physics like this, that is the claim to hold them too, and the

6:39 industry keeps flinching. The standards body already raised its height cap, so HBM4 could keep old style solder bumps. And SKH says fuse copper isn't ready before HBM5. So, is this a Samsung

6:52 invention? No. The same week as that hot chips deck, SK Heinix told Korean press it plans the same endgame. Memory stacked directly on the accelerator and the road maps side by side are one

7:06 staircase. The ground floor moves onto a logic process. Then it absorbs the controller. Then the street disappears. Both giants are climbing. They only argue about the year. That's the

7:17 technology. Now the business. Why is Samsung the loudest? So follow the share in HBM. The memory the AI boom actually pays for. SKHX took 58% of early 2026 revenue. Samsung took 21. Samsung lost

7:33 that round. And this year it's been sprinting. HBM 4 in mass production by February. The industry's first HBM 4E samples in May and number one in DRM revenue again by midyear. At the Silicon

7:47 Valley show, Soul's Business Press caught Samsung's DRAM vice president saying three words. Samsung is back. That's the incentive read. When you're behind on today's product, you sell

7:58 tomorrow's architecture. It costs nothing and it resets the race. So, the verdict, the direction is real. Judge actions, not slides. Both memory giants are designing for it. The standards body

8:11 is bending around it. And independent labs are fighting its heat already. The interposer era ends. The multipliers are marketing. Three rulers in one month, a bracket saying four under a headline

8:23 saying eight, and nothing you can buy before 2030. If you run GPUs, the race paying your bills through then is HBM 4E. But if the thermal bet lands, this is the biggest redesign since HBM

8:36 itself. I'd believe the direction while discounting the 8. My marker. some GPU maker commits to memory on top silicon by the end of 2027 or that after 2029 date slips further because when memory

8:50 finally fuses onto the processor, two industries become one part. So who do you buy your computer from then? The company that made the processor or the one that made the memory. Subscribe for

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